The SDS Sigma series was a series of computers that was introduced by Scientific Data Systems in 1966.[1] The first machines in the series were the 16-bit Sigma 2 and the 32-bit Sigma 7; the Sigma 7 was the first 32-bit computer released by SDS. At the time the only competition for the Sigma 7 was the IBM 360.
Memory size increments for all SDS/XDS/Xerox computers was stated in kWords, not kBytes. For example, the Sigma 5 base memory was 16K 32-Bit words (64K Bytes). Maximum memory was limited by the length of the instruction address field of 17 bits, or 128K Words (512K Bytes). Although this is a trivial amount of memory in today's technology, Sigma systems performed their tasks exceptionally well, and few were deployed with, or needed, the maximum 128K Word memory size.
The Sigma series was commercially retired in the 1970s when Xerox, which bought SDS in 1969, left the mainframe computer business.[2]
Contents |
Model | Date | Floating point | Decimal | Byte string | Memory map | Max memory (kwords) |
---|---|---|---|---|---|---|
Sigma 7 | 1966 | optional | optional | standard | optional | 128 |
Sigma 5 | 1967 | optional | N/A | N/A | N/A | 128 |
Sigma 6 | 1970 | optional | standard | standard | standard | 128 |
Sigma 9 | 1971 | standard | standard | standard | standard | 512 |
Sigma 8 | 1972 | standard | N/A | N/A | N/A | 128 |
Sigma 9 model 2 | ? | standard | standard | standard | standard | 256 |
Sigma 9 model 3 | 1973 | standard | N/A | N/A | standard | 512 |
Model | Date | Max memory (kwords) |
---|---|---|
Sigma 2 | 1966 | 64 |
Sigma 3 | 1964 | 64 |
Sigma systems provided a range of performance of about double from the slowest, Sigma 5, to the fastest, the Sigma 9 model 3. For example, 32-bit fixed point multiply times ranged from 3.8 to 7.2 microseconds; 64-bit floating point divide ranged from 17.4 to 30.5 μsec.
Most Sigma systems included two or more blocks of 16 general-purpose registers. Switching blocks was accomplished by a single instruction (LPSD), providing fast context switching since registers did not have to be saved and restored.
Memory in the Sigma systems could be addressed as individual bytes, halfwords, words, or doublewords.
All 32-bit Sigma systems except the Sigma 5 and Sigma 8 used a memory map to implement virtual memory. The following description applies to the Sigma 9, other models had minor differences.
The effective virtual address of a word was 17 bits. Virtual addresses 0 thru 15 were reserved to reference the corresponding general purpose register, and were not mapped. Otherwise, in virtual memory mode the high-order eight bits of this address, called virtual page number, were used as an index to an array of 256 13-bit memory map registers. The thirteen bits from the map register plus the remaining nine bits of the virtual address formed the address used to access real memory.
Access protection was implemented using a separate array of 256 two-bit access control codes, one per virtual page (512 words), indicating a combination of read/write/execute or no access to that page.
Independently, an array of 256 2-bit access control registers for the first 128k words of real memory functioned as a "lock-and-key" system in conjunction with two bits in the program status doubleword. The system allowed pages to be marked "unlocked", or the key to be a "master key". Otherwise the key in the PSD had to match the lock in the access register in order to reference the memory page.
Input/output was accomplished using a control unit called an IOP (Input-output processor). An IOP provided an 8-bit data path to and from memory. Systems supported up to 8 IOPs, each of which could attach up to 32 device controllers.[4] [5]
An IOP could be either a selector I/O processor (SIOP) or a multiplexer I/O processor (MIOP). The SIOP provided a data rate up to 1.5 megabytes per second (MBPS), but allowed only one device to be active at a time. The MIOP, intended to support slow speed peripherals allowed up to 32 devices to be active at any time, but provided only a .3 MBPS aggregate data rate.
The primary mass storage device, known as a RAD (Random Access Disk), contained 512 fixed heads and a large (approx 600mm/24in dia) vertically mounted disk spinning at relatively low speeds. Because of the fixed head arrangement access was quite fast. Capacities ranged from 1.6 to 6.0 megabytes and was used for temporary storage. Large capacity multi platter disks were employed for permanent storage.
Device | Device type | Capacity (MiB) | Avg seek time (msec) | Avg rotational delay (msec) | Avg transfer rate(KiB/sec) |
---|---|---|---|---|---|
3214 | RAD | 2.75 | N/A | 8.5 | 647 |
7202 | RAD | .7 | N/A | 17 | 166 |
7203 | RAD | 1.4 | N/A | 17 | 166 |
7204 | RAD | 2.8 | N/A | 17 | 166 |
7232 | RAD | 6.0 | N/A | 17 | 355 |
3231 | Cartridge disk | 2.4 removable | 38 | 12.5 | 246 |
3232 | Cartridge disk | 4.9 removable | 38 | 12.5 | 246 |
3233 | Cartridge disk | 4.9 fixed 4.9 removable |
38 | 12.5 | 246 |
3242 | Cartridge disk | 5.7 removable | 38 | 12.5 | 286 |
3243 | Cartridge disk | 5.7 fixed 5.7 removable |
38 | 12.5 | 286 |
7251 | Cartridge disk | 2.3 removable | 38 | 12.5 | 225 |
7252 | Cartridge disk | 2.3 fixed 2.3 removable |
38 | 12.5 | 225 |
3277 | Removable disk | 95 | 30 | 8.3 | 787 |
7271 | Removable disk | 46.8 | 35 | 12.5 | 245 |
The Sigma 5 computer owned by Carnegie Mellon University was donated to the Computer History Museum in 2002. The system consisted of five full-size cabinets with a monitor, control panel and a printer. It is possibly the last surviving Sigma 5 that is still operational.[2]
The Sigma 5 sold for US$300,000 with 16 kilowords of random-access magnetic-core memory, with an optional memory upgrade to 32 kW for an additional $50,000. The hard disk drive had a capacity of 3 megabytes.[6]
Sigma 5 and 8 systems lacked the memory map feature, The Sigma 5 was supported by the Basic Control Monitor (BCM) and the Batch Processing Monitor (BPM). The Sigma 8 could run the Real-time Batch Monitor (RBM) as well as BPM/BTM.
The remaining models initially ran the Batch Processing Monitor (BPM), later augmented with a timesharing option (BTM); the combined system was usually referred to as BPM/BTM. The Universal Time-Sharing System (UTS) became available in 1971, supporting much enhanced time-sharing facilities. A compatible upgrade (or renaming) of UTS, Control Program V (CP-V) became available starting in 1973 and added real-time, remote batch, and transaction processing. A dedicated real-time OS, Control Program for Real-Time (CP-R) was also available for Sigma 9 systems. The Xerox Operating System (XOS), intended as an IBM DOS replacement, also ran on Sigma 6/7/9 systems, but never gained real popularity.
The Basic Control Monitor (BCM) for the Sigma 2 and 3 provided "Full real-time capability with some provision for batch processing in the background."[7]